This invention relates generally to devices for testing electronic components and, more particularly, to devices for testing microelectronic components, including integrated-circuit (IC) chips.
An integrated-circuit (IC) chip generally contains thousands of microscopic circuit elements, such as transistors, resistors and capacitors. These circuit elements are interconnected within the IC chip in a variety of circuit configurations, with input/output leads of the various circuits connected to conductive areas or pads located about the periphery of the IC chip. To ensure that the various circuits in each IC chip are functioning properly, so that each IC chip can be used reliably in some type of electronic device, it is desirable that each IC chip be tested prior to being installed in the electronic device. Furthermore, because packaging an IC chip is relatively costly and time consuming, and because a significant number of IC chips fail the testing process and have to be discarded, it is also desirable that each IC chip be tested prior to being placed in its chip package.
An unpackaged IC chip, having no pins or leads, can be electrically connected to an IC chip testing device by means of a test probe card. A conventional test probe card is disclosed in U.S. Pat. No. 3,835,381 to Garretson et al. The Garretson et al. test probe card comprises a probe assembly mounted in an aperture located at one end of a test circuit board. The probe assembly, a radial array of inwardly-projecting, electrically-conductive probe wires, makes electrical contact with the contact areas about the periphery of the unpackaged IC chip. Each probe wire is fabricated from a tungsten wire, with the contact portion of each probe wire being tapered and bent at right angles to the axis of the probe assembly for contact with a chip contact area. Circuit board traces electrically connect the probe wires with an edge card connector at the other end of the test circuit board. The edge card connector electrically connects the test circuit board to a chip testing device.
Although the Garretson et al. test probe card has many advantages, it does have certain disadvantages. One disadvantage is that the test probe card is rather costly to manufacture and has a limited useful life. Another disadvantage is that the test probe assembly is extremely delicate, with the probe wires being easily bent and requiring constant realignment. Finally, another disadvantage is that because of the ever increasing speed of IC chips, the parasitic capacitances of the probe wires and long circuit board traces can severely limit the high speed testing of IC chips. To obviate or minimize the disadvantages arising from the use of conventional test probe cards, it is apparent that a new approach for testing unpackaged IC chips is needed. The new approach should be less costly to manufacture and have a longer useful life. The new approach should also minimize contact resistance and probe alignment difficulties and, most importantly, the new approach should minimize parasitic capacitance. The present invention is directed to these ends.